1. Field of the Invention
The present invention relates to a plasma display panel for a use in information processing terminals and flat wall television sets, and a display employing the same. In particular, the present invention relates to a plasma display panel capable of operating at greatly improved luminous efficiency and of displaying images in greatly improved luminance, and to a display employing the same.
2. Description of the Related Art
A reflective three-electrode surface discharge plasma display panel provided with two kinds of transparent display electrodes formed on the same surface of a front substrate is used prevalently. A prior art reflective three-electrode surface discharge plasma display panel is disclosed in JP 10-207419A.
Referring to FIG. 12 showing part of the known plasma display in a perspective view, there are shown a front substrate FS, a back substrate BS, a front glass substrate 1, an X display electrode 2, a transparent X display electrode 2a, an X bus electrode 2b, a Y display electrode 3, a transparent Y display electrode 3a, a Y bus electrode 3b, a protective film 4, a dielectric layer 5, a back glass substrate 6, address electrodes 7, a dielectric layer 8, barrier ribs 9, fluorescent layers 10R, 10G and 10B, and discharge spaces 11. The X display electrode 5 and the Y display electrode 6 will be referred to inclusively as display electrodes.
As shown in FIG. 12, in the back substrate BS, the plurality of address electrodes 7 are arranged in parallel on the back glass substrate 6. The dielectric layer 8 covers the address electrodes 7 entirely. The barrier ribs 9 are formed parallel with the address electrodes 7 in parts corresponding to the address electrodes 7 on the dielectric layer 8 so as to define elongate spaces parallel to the address electrodes 7. The fluorescent layers that emit color light when irradiated with ultraviolet rays are formed on the side surfaces of the barrier ribs 9 and the surface of the dielectric layer 8. The fluorescent layers 10R formed in every two other discharge spaces 11 emit red light, the fluorescent layers 10G formed in every two other discharge spaces 11 emit green light, and the fluorescent layers 10B formed in every two other discharge spaces 11 emit blue light.
In the front substrate FS, the X display electrodes 2 and the Y display electrodes 3 are formed alternately in parallel on the front glass substrate 1 so as to extend in a direction perpendicular to the address electrodes 7 formed on the back glass substrate 6. Each of the X display electrodes 2 has the transparent X display electrode 2a and the X bus electrode 2b formed on the transparent X display electrode 2a. Each of the Y display electrodes 3 has the transparent Y display electrode 3a and the Y bus electrode 3b formed on the transparent Y display electrode 3a. The X display electrode 2 and the Y display electrode 3 adjacent to the X display electrode 2 form one display electrode pair. In the display electrode pair, the X bus electrode 2b is formed on the transparent X display electrode 2a along an edge remote from the transparent Y display electrode 3a of the transparent X display electrode 2a, and the Y bus electrode 3b is formed on the transparent Y display electrode 3a along an edge remote from the transparent X display electrode 2a of the transparent Y display electrode 3a. The dielectric layer 5 covers the X display electrodes 2 and the Y display electrodes 3 entirely. The protective film 4 of MgO or the like is formed on the dielectric layer 5.
A plasma display panel is constructed by setting the back glass substrate 6 and the front glass substrate 1 provided with those electrodes opposite to each other and joining the same together as indicated by the arrows with the protective film 4 of the front glass substrate 1 in contact with the barrier ribs 9.
A specific gas is sealed in the discharge spaces 11 defined by the protective film 4, the barrier ribs 9 having surfaces coated with the fluorescent layers 10R, 10G and 10B, and the dielectric layer 8. The X bus electrode 2b and the Y bus electrode 3b of each display electrode pair and the two adjacent barrier ribs 9 define a space that serves as a discharge cell in the discharge space 11.
FIG. 13 shows the arrangement of the electrodes of the plasma display panel shown in FIG. 12. In FIG. 13, A1, A2, . . . and An (n≧1) indicate the address electrodes 7 shown in FIG. 12, X1, X2, . . . and Xm (m>1) indicate the X display electrodes 2, and Y1, Y2, . . . and Ym indicate the Y display electrodes 3.
Referring to FIG. 13, the m X display electrodes X1, X2, . . . and Xm and the m Y display electrodes Y1, Y2, . . . and Ym are arranged alternately parallel with each other. Ends of the X display electrodes X1, X2, . . . and Xm are connected together to apply the same driving voltage to the X display electrodes X1, X2, . . . and Xm. Thus, the X display electrodes 2 are referred to as common display electrodes. Driving voltages respectively having different waveforms are applied respectively to the Y display electrodes Y1, Y2, . . . and Ym. The address electrodes A1, A2, . . . and An are independent, and the X display electrodes X1, X2, . . . and Xm and the Y display electrodes Y1, Y2, . . . and Ym are perpendicular to each other, and driving voltages of different waveforms are applied to those electrodes.
FIG. 14 illustrates an addressing method of driving such an AC type plasma display panel. This addressing method drives subfields individually.
One field period F is divided into, for example, eight subfields SF1 to SF8. A period corresponding to the difference between total time corresponding to the eight subfields and the period of one cycle of a vertical synchronizing signal Vsync is a blank period TB. As shown in FIG. 15, each of the subfields SFn (n=1, 2, . . . and 8) consists of a priming and erase discharge period TW, an address discharge period TA and a discharge sustaining period TS.
The priming and erase discharge period TW and the address discharge period TA must be the same in all the subfields SFn. For example, the address discharge period TA is dependent on the number m of the Y display electrodes (FIG. 13) and the period of scan pulses applied sequentially to the Y display electrodes 3. The discharge sustaining period TS is dependent on the period and number of a stream of discharge sustaining pulses. In the priming and erase discharge period TW, a discharge occurs between the X display electrode 2 and the Y display electrode 3 to produce a wall charge by producing charged particles. In the address discharge period TA, a discharge occurs between the Y display electrodes 3 and the address electrodes 7 for the cells in which a sustained discharge must be generated (discharge cells) for the discharge sustaining period TS, to select discharge cells in which a discharge is sustained for the discharge sustaining period TS. A discharge is repeated in the selected discharge cells by the number of times corresponding to the number of discharge sustaining pulses applied in the discharge sustaining period TS in the subfields. As shown in FIG. 14, the one field F has eight subfields SF, and the number of discharge sustaining pulses in the discharge sustaining period TS of the subfields SF1, SF2, . . . and SF8 is weighted by a weight expressed by a binary code.
Suppose that the numbers of discharge sustaining pulses, i.e., discharge sustaining cycles, in the discharge sustaining period TS of the subfields SF1, SF2, . . . and SF8 are NSF1 to NSF8. Then, the ratio between the discharge sustaining cycles is equal to the weighting ratio expressed by binary codes: NSF1: NSF2: . . . :NSF8=1:2:4:8: . . . :128. Thus, pictures can be displayed in 256 gradations by using the subfields in which a sustained discharge occurs in the discharge sustaining period TS in combination. For example, when the 10th gradation from a low luminance excluding the gradation zero is displayed, the subfields SF2 and SF4 corresponding to the relative ratios 2 and 8 between the numbers of discharge sustaining pulses are selected by an address discharge in the address discharge period TA, and a discharge is sustained for the discharge sustaining periods TS.
This prior art plasma display panel does not have any internal ground electrode (earth electrode) or is not provided with any ground electrode. Therefore, the plasma display panel cannot be satisfactorily grounded, discharges in the panel are unstable, and undesired electromagnetic radiation that affects adversely to the nearby drive circuit occurs.
In the plasma display panel shown in FIG. 12, a glow discharge (plasma) is generated between the display electrodes, i.e., the X display electrodes 2 and the Y display electrodes 3, the fluorescent films 10R, 10G and 10B are excited by ultraviolet rays produced by the glow discharge to make the fluorescent layers 10R, 10G and 10B emit visible light. However, if the distances between the display electrodes 2 and 3 are not sufficiently long, the discharge mode of glow discharge has difficulty in forming a positive column region that produces ultraviolet rays effectively, and most part of the glow discharge is a negative glow region. The discharge sustaining current must be reduced in the discharge sustaining period TS to produce positive columns efficiently. Since the barrier ridges 9 shown in FIG. 12 are dielectric, charged particles produced by a discharge diffuse into the barrier ribs 9, causing loss that reduces luminous efficiency. The current needs to be increased to sustain a discharge, which reduces the efficiency of positive columns.
A plasma display panel disclosed in JP 11-312470A employs a metal barrier ribs formed of a conductive metal to solve such problems. FIG. 16 is a longitudinal sectional view of this prior art plasma display panel, in which parts like or corresponding to those shown in FIG. 12 are denoted by the same reference characters. Shown in FIG. 16 are fluorescent layers 10, base films 12 and 13, a dielectric layer 14, a protective layer 15 of MgO or such, metal barrier ribs 16 and oxide films 17.
As shown in FIG. 16, Y display electrodes 3 are formed on a back substrate BS. The back substrate BS has a back glass substrate 6, a base layer 13 of SiO2 formed on the back glass substrate 6, address electrodes 7 of a thick conductive film of an Ag-bearing material formed on the base layer 13, a dielectric layer 8 covering the address electrodes 7, Y display electrodes 3 of a thick conductive film of an AG-bearing material formed on the dielectric layer 8, a dielectric layer 14 covering the Y display electrodes 3, and the protective layer 15 of MgO or such. The front substrate FS has a front glass substrate 1, a base layer 12 of SiO2 formed on the front glass substrate 1, X display electrodes 2 each consisting of a transparent X display electrode 2a of an Ag-bearing material and an opaque X bus electrode 2b of an Ag-bearing material formed on the base layer 12, a dielectric layer 5 covering the X display electrodes 2, and a protective layer 4 of MgO formed on the dielectric layer 5.
Metal barrier ribs 16 are sandwiched between the front substrate FS and the back substrate BS so as to define discharge spaces 11. The metal barrier ribs 16 are formed by making through holes corresponding to the discharge spaces 11 for cells in a thin plate of an Fe—Ni alloy having a coefficient of thermal expansion substantially equal to those of the glass substrates 1 and 6 by an etching process. FIG. 17 is a sectional view taken on line Z-Z in FIG. 16. As shown in FIG. 17, the discharge spaces 11 of the cells are surrounded by the metal barrier ribs 16. The metal barrier ribs 16 are covered entirely with an insulating oxide film 17. Surfaces of the metal barrier ribs 16 defining the discharge spaces 11, i.e., the inner surfaces of the through holes provided in the thin plate, are coated with fluorescent layers 10.
When a fixed bias voltage is applied to the metal barrier ribs 16 of this plasma display panel, wall charges are accumulated in the dielectric layer (oxide film 17) covering the metal barrier ribs 16 or in the fluorescent layers 10, whereby the neutralization of the charged particles is controlled, energy loss due to diffusion into the barrier ribs can be reduced, stable positive columns are formed, and discharge efficiency and luminous efficiency are improved.
The prior art plasma display panel is able to form stable positive columns by reducing discharge sustaining current to improve discharge efficiency. However, the low driving current reduces luminance for one pulse. Thus, the plasma display panel is required to achieve both high emission efficiency and high luminous efficiency.